By Alpha Architecture Committee, Richard T. Witek
This can be the authoritative reference on electronic gear Corporation's new 64-bit RISC Alpha structure. Written via the designers of the interior electronic requisites, this booklet includes whole descriptions of the typical structure required for all implementations and the interfaces required to help the OSF/1 and OpenVMS working systems.
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Extra info for Alpha Architecture Reference Manual
NOTE Alpha i m p l e m e n t a t i o n s will impose a significant performance p e n a l t y w h e n accessing T__floating o p e r a n d s t h a t a r e not n a t u r a l l y aligned. 7 Longword Integer Format In Floating-Point Unit A longword integer o p e r a n d occupies 32 bits in memory, a r r a n g e d as shown in Figure 2-15. Figure 2-15: Longword Integer Datum Integer Lo :A Integer Hi :A+2 A longword integer o p e r a n d occupies 64 bits in a floating register, a r r a n g e d a s shown in F i g u r e 2 - 1 6 .
It is a t least 8 ( m i n i m u m lock r a n g e is a n aligned quadword) a n d is a t most t h e page size for t h a t i m p l e m e n t a t i o n ( m a x i m u m lock r a n g e is one physical page). A processor's lock_flag is also cleared if t h a t processor e n c o u n t e r s a CALL_PAL R E I instruction. It is U N P R E D I C T A B L E w h e t h e r or not a processor's lock_flag is cleared on a n y o t h e r CALL_PAL instruction. It is U N P R E D I C T A B L E w h e t h e r a processor's lock_flag is cleared by t h a t processor's executing a n o r m a l load or store instruction.
If bit <12> of t h e instruction is 1, a n 8-bit zero-extended literal c o n s t a n t is formed by bits <20:13> of t h e instruction. T h e literal is i n t e r p r e t e d a s a positive integer b e t w e e n 0 a n d 255 a n d is zero-extended to 64 bits. Symbolically, t h e integer Rbv o p e r a n d is formed a s follows: IF inst<12> EQ 1 THEN Rbv 4 - ZEXT(inst<20:13>) ELSE IF inst<20:16> EQ 31 THEN Rbv <- 0 ELSE Rbv <- Rb END END T h e Rc field specifies a destination operand. 4 Floating-Point Operate Instruction Format The Floating-point O p e r a t e format is used for instructions t h a t perform floatingpoint register to floating-point register operations.